IMPLEMENTATION OF NTT HARDWARE ACCELERATOR BASED ON KYBER ALGORITHM
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Abstract
The required parameters of the existing NTT calculation circuit are generally fixed, and the computable data format is not flexible enough. This paper presents an NTT hardware accelerator based on Kyber algorithm, which provides a parameter configurable NTT calculation. The twiddle factors, special prime number, the width and number of calculated elements could be configured, and the data with 256 points and 16 bit width could be calculated at most, which had a certain flexibility. When selecting specific parameters to realize NTT acceleration of Kyber algorithm, it could use NTT hardware accelerator in 1. 6 μs to complete NTT calculation, which was 201 times faster than the software implementation on Cortex-M4. Therefore, this design can be applied to the lattice based cryptography scheme including Kyber algorithm to effectively improve the overall operation speed of the cryptography scheme.
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